of the erase voltage as discussed with respect to FIGS. 6A and 6B.FIG. 8 is a block diagram illustrating a non-volatile memory device according to another example embodiment.FIG. 9 illustrates a cross-section of a string in FIG. 8 as well as voltages applied to the transistors in the string during an erase operation according to an embodiment.FIG. 10 illustrates a cross-section of a string in FIG.