Note that, because the block selecting line BS<1> is at ???L??? for the period of selecting the word line WL<1>, and the block selecting NMOS transistors 34 connected to the bit lines BL<0> and BL<2> are made to be in non-conductive states, the above-described electric potential difference VTestBL is not applied to the memory blocks other than the memory blocks including the memory cells MC1 and M