For a better understanding, FIG. 5A is a flowchart succinctly describing an embodiment of the steps executed by the logic machine to process a command for writing a data block, by using the register RREG. The following steps can be distinguished: Step S1: WAIT Step S10: <WRITE DTi; Ai> Step S11: LOAD DTi and IREAD B(Ai) Step S12: b0 = 0?