{ "items" : [
    { "id" : "http://webisa.webdatacommons.org/427985204"
      "properties" : {
        "http://www.w3.org/1999/02/22-rdf-syntax-ns#type" : [ "http://www.w3.org/ns/prov#Entity" ] ,
        "http://www.w3.org/ns/prov#value" : [ "A controller 7 outputs internal timing signals for reading, writing and erasing in response to control signals such as write enable signal /WE, read enable signal /RE, address latch enable signal ALE and command latch enable signal CLE and the like, thereby controlling data write and erase sequence and data read operation based on the internal timing signals." ] ,
        "http://www.w3.org/ns/prov#wasQuotedFrom" : [ "google.com" ] } },

    { "id" : "http://webisa.webdatacommons.org/prov/305618175"
      "properties" : {
        "http://www.w3.org/ns/prov#wasDerivedFrom" : [ "http://webisa.webdatacommons.org/427985204" ] } },

    { "id" : "http://webisa.webdatacommons.org/prov/390041006"
      "properties" : {
        "http://www.w3.org/ns/prov#wasDerivedFrom" : [ "http://webisa.webdatacommons.org/427985204"] } } }
