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n4google.
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provhttp://www.w3.org/ns/prov#
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Subject Item
isa:266937640
rdf:type
prov:Entity
prov:value
In accordance with a further aspect of this invention, there is provided a memory subsystem comprising at least two semiconductor devices; a main bus containing a plurality of bus lines for carrying substantially all address, data and control information needed by the devices, the semiconductor devices including at least one memory device connected in parallel to the bus; where read and write data
prov:wasQuotedFrom
n4:ca
Subject Item
isap:396589680
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isa:266937640