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FIG. 12A and FIG. 12B are a partially cutaway top plan view and a cross sectional view, respectively, illustrating a condition of the semiconductor device according to the first variation corresponding to the above-mentioned condition shown in FIG. 7A and FIG. 7B. As shown in FIGS. 12A and 12B, when the molding by the package resin 113 is performed, it is preferable that portions of the package re
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