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<http://webisa.webdatacommons.org/104427221>	<http://www.w3.org/ns/prov#value>	"FIGS. 9A and 9B are a block diagram and schematic representation of a single component video data path for the video output processor shown in FIG. 8." .
<http://webisa.webdatacommons.org/prov/131002557>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/104427221> .
<http://webisa.webdatacommons.org/104427221>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/prov/130961348>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/104427221> .
<http://webisa.webdatacommons.org/104427221>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<google.com> .
<http://webisa.webdatacommons.org/prov/30042349>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/104427221> .