<http://webisa.webdatacommons.org/11543389>	<http://www.w3.org/ns/prov#value>	"FIG. 11 is a schematic of a fourth embodiment of a programmable logic device in accord with the present invention having a pair of multiplexers for functional unit level testing." .
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<http://webisa.webdatacommons.org/prov/239180570>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/11543389> .
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