<http://webisa.webdatacommons.org/prov/25166750>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/1572805> .
<http://webisa.webdatacommons.org/prov/217196103>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/1572805> .
<http://webisa.webdatacommons.org/1572805>	<http://www.w3.org/ns/prov#value>	"(2) As for the device structure of the MISFET used for the volatile memory elements in the semiconductor memory device according to the present invention, the first embodiment is an example where the MISFETs are formed on an SOI substrate, and the third embodiment is an example where vertical MISFETs of which the channel body region is electrically isolated form the semiconductor substrate are pro" .
<http://webisa.webdatacommons.org/1572805>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/1572805>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<google.com> .