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<http://webisa.webdatacommons.org/prov/29971591>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/162741661> .
<http://webisa.webdatacommons.org/162741661>	<http://www.w3.org/ns/prov#value>	"FIG. 2, comprising FIGS. 2A to 2C, is a block diagram of an image processing circuit according to the embodiment of the present invention;" .
<http://webisa.webdatacommons.org/162741661>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<google.com> .