<http://webisa.webdatacommons.org/163391854>	<http://www.w3.org/ns/prov#value>	"In modes 1, 2, and 6, data is output on the Dout pin along with the clock on the clkout pin. The configuration scheme allows the user to provide a Cclk at up to 16 MHz for these modes. However, for cascaded programming and other applications" .
<http://webisa.webdatacommons.org/163391854>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<docstoc.com> .
<http://webisa.webdatacommons.org/163391854>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/prov/65579478>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/163391854> .