<http://webisa.webdatacommons.org/prov/354668098>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/242898897> .
<http://webisa.webdatacommons.org/242898897>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/242898897>	<http://www.w3.org/ns/prov#value>	"If the instruction is a load instruction, the MUX 218 is controlled such that the effective address is provided to the L1 data cache 110 during the EX1 stage. If the HIT signal indicates the needed data is present in the L1 data cache 110 (i.e.," .
<http://webisa.webdatacommons.org/242898897>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<docstoc.com> .