<http://webisa.webdatacommons.org/267878660>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/267878660>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<patents.com> .
<http://webisa.webdatacommons.org/267878660>	<http://www.w3.org/ns/prov#value>	"FIG. 5A is a schematic diagram and FIG. 5B is a cross-sectional view showing three-dimensional DCVS logic AND/NAND gates;" .
<http://webisa.webdatacommons.org/prov/29685760>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/267878660> .
<http://webisa.webdatacommons.org/prov/54958300>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/267878660> .