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<http://webisa.webdatacommons.org/363665837>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<google.com> .
<http://webisa.webdatacommons.org/prov/332667360>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/363665837> .
<http://webisa.webdatacommons.org/363665837>	<http://www.w3.org/ns/prov#value>	"FIGS. 4A and 4B are a plan and a longitudinal section views showing memory cell layouts of a semiconductor device according to the present invention;" .
<http://webisa.webdatacommons.org/363665837>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .