<http://webisa.webdatacommons.org/379880046>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/prov/334275710>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/379880046> .
<http://webisa.webdatacommons.org/379880046>	<http://www.w3.org/ns/prov#value>	"FIGS. 7A and 7B are a plan view and a sectional view illustrating a second mask process among the manufacturing method of a thin film transistor array substrate according to the first embodiment of the present invention, respectively;" .
<http://webisa.webdatacommons.org/prov/333825254>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/379880046> .
<http://webisa.webdatacommons.org/379880046>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<google.com> .