<http://webisa.webdatacommons.org/83156342>	<http://www.w3.org/ns/prov#value>	"Furthermore, the present invention is applicable to various types of memories in which a programming operation is conducted in several verify-program cycles, particularly serial Flash memories, Flash memories with parallel inputs/outputs, and the" .
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<http://webisa.webdatacommons.org/prov/453249590>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/83156342> .
<http://webisa.webdatacommons.org/prov/419887023>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/83156342> .
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