More specifically, FIG. 5A is a top plan view that schematically illustrates surface regions of the heat conductive device (80) which interface with a package substrate and IC chips mounted on the package substrate, and FIG. 5B is a cross-sectional side view of the heat conducting device (80) taken along line 5B-5B in FIG. 5A. The exemplary embodiment of FIGS. 5A???5B is similar to that of FIGS. 4