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An Entity of Type : prov:Entity, within Data Space : webisadb.webdatacommons.org associated with source dataset(s)

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prov:value
  • Thus, as shown particularly in FIG. 2, input data word D0 enters the encoder during clock cycle I, and the upper portion abcdei of data word D0 is output during clock cycle II. As indicated at S, the running disparity of the 6-bit output of data word D0 is held and used to encode the 4-bit output of data word D0.
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