One of the inputs to the NAND gate 666 is connected to the output of a 2 input OR gate 668, one of whose inputs is a signal that indicates that the next state of the state machine is state PD. The second input of the OR gate 668 is connected to the output of a 3 input OR gate 670, whose inputs are connected to the MXCADR signal and to signals indicating that the next state of the state machine is