An additional feature of the multiple processor systems of the present application is that they enable agents on the I/O buses to run at substantially full speed when moving data to or from the main memory, i.e. the memory interleaves 118-124 of FIGS. 1A and 1B. To that end, the I/O bus interface circuits 134, 136 are arranged to supply data read from main memory as fast as an agent can receive it