About: isa:267281942   Sponge Permalink

An Entity of Type : prov:Entity, within Data Space : webisadb.webdatacommons.org associated with source dataset(s)

AttributesValues
rdf:type
prov:value
  • In a cache controller for use in a microprocessor-based system, the system including a static random access memory (SRAM), and a clock, the cache controller for providing to the SRAM a write enable (WE) signal having a leading edge and a trailing edge, a circuit for modifying a WE signal pulse width in order to accommodate a plurality of microprocessor types, the circuit comprising:signal hit mean
prov:wasQuotedFrom
is prov:wasDerivedFrom of
Alternative Linked Data Views: ODE     Raw Data in: CXML | CSV | RDF ( N-Triples N3/Turtle JSON XML ) | OData ( Atom JSON ) | Microdata ( JSON HTML) | JSON-LD    About   
This material is Open Knowledge   W3C Semantic Web Technology [RDF Data] Valid XHTML + RDFa
OpenLink Virtuoso version 07.20.3217, on Linux (x86_64-pc-linux-gnu), Standard Edition
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2012 OpenLink Software