n memory cell; [0106]FIGS. 5A and 5B are a plan view and a sectional view, respectively, illustrating a second well-known non-volatile semiconductor memory device; [0107]FIGS. 6A to 6D are sectional views each illustrating a step of manufacturing the structure shown in FIGS. 5A and 5B; [0108]FIGS. 7A and 7B are a plan view and a sectional view, respectively, illustrating a third well-known non-vol