FIG. 1 is a plan view illustrating a semiconductor integrated circuit device representing an Embodiment 1 according to the present invention, FIG. 2 is a cross sectional view taken along line A-A??? in FIG. 1, FIG. 3 and FIG. 4 are a plan view and a cross sectional view illustrating a state of mounting a semiconductor integrated circuit device to a mounting substrate, FIG. 5 is a flow chart illust