is a timing chart to describe the operation of the processors shown in FIGS. 13 and 14; [0033]FIG. 16 is a flowchart to describe a multi-thread execution method of a sixth embodiment according to the present invention; [0034]FIG. 17 is a flowchart to describe a multi-thread execution method of a seventh embodiment according to the present invention; [0035]FIG. 18 is a flowchart to describe a multi