rease reduction. [0058] FIGS. 31(a) and 31(b) are a plan view and temperature increase plot, respectively, illustrating a beater resistor having a spatial thermal pattern according to the present inventions; [0059] FIGS. 32(a) and 32 b are a plan view and temperature increase plot, respectively, illustrating a heater resistor having a spatial thermal pattern having a stepped reduction in increase