The microprocessor in FIG. 1 includes an internal bus 11, a central processing unit (CPU) 12, a DRAM interface circuit 13 linked by the internal bus 11 to the CPU 12, and a synchronous DRAM (SDRAM) 14 connected to the DRAM interface circuit 13. [0028] The DRAM interface circuit 13 controls read and write access to the SDRAM 14 according to address signals and other control signals, such as a read