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  • The vector negate instruction is an example of a RISC-type instruction. [0063]FIG. 7 illustrates an operational diagram of a Vector Conditional Negate and Add/Subtract (???vcnadd???/???vcnsub???) compound instruction of the present invention that performs a vector addition or subtraction on the ith FS-bit field of register VRB 11 from the corresponding field of an input (accumulator) register VRA
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