. 9A and 9B are illustrative of the relationship between a branch instruction and FIFO reset; [0048]FIG. 10 is a functional block diagram of an example of the configuration of the debugging tool; [0049]FIGS. 11A and 11B are illustrative of a real-time trace; [0050]FIGS. 12A, 12B, and 12C show examples of internal block diagrams of various items of electronic equipment; and [0051]FIGS. 13A, 13B, an