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  • Address tenure control for cache management wherein bus master addresses are internally latched in a cache controllerUS5812816 *Feb 26, 1997Sep 22, 1998Sun Microsystems, Inc.System and method for transferring data between memories of different types occupying a single real address space using a dedicated memory transfer busUS5813030 *May 2, 1997Sep 22, 1998Compaq Computer Corp.Cache memory system
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