Semiconductor layer 5 and the ohmic contact layer are formed by depositing (through PCVD) and patterning amorphous silicon (a-Si) and doped amorphous silicon (n+a-Si), respectively, as shown in FIG. 18B. Data bus line 3 and source/drain electrodes 7, 9 are formed by, for example, sputtering and patterning a metal such as Al, Mo, Cr, Ta or Al alloy, as shown in FIG. 18C.