FIG. 9A is an top view showing the overlap of an active layer, a gate wiring, and a source wiring, while FIG. 9B is a top view showing the overlap state of a shielding film and a pixel electrode on FIG. 9A. The gate wiring 341 in FIG. 9A intersects with the island-like semiconductor film 306 below, through a gate insulating film not shown in the figures.