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  • Specifically, the duo today announced the development of a new 3-bit-per-cell (3bpc) multi-level cell (MLC) NAND technology, which takes advantage of their heralded 34-nanometer NAND process.Just in case you didn't get the memo, these chips that they are working on are traditionally used in storage devices such as flash cards and USB drives, where high density and cost-efficiency are paramount.
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